Design of SOI FinFET based Two Stage OperationalTransconductance Amplifier VLSI Circuits and Systems
Date of Submission
16th Dec 2025
General Information:
|
| Year Of Paper Submission : 2018-19 |
| Type of Applicant : Student |
| Selected Course : UG |
| Department of Applicant : COMPS |
| Class of Applicant : F.E. |
Applicants Details:
|
| Applicant Name : P. Pilankar |
| Applicant No. 2 Name : A. Saini |
Guide Details:
|
| Department of Guide No. 1 : Electronics & Telecommunication |
| Name of First Guide : Dr. Reena Sonkusare |
| Name of Second Guide : Dr. Surendra Rathod |
Paper Details:
|
| Title of Paper : Design of SOI FinFET based Two Stage OperationalTransconductance Amplifier VLSI Circuits and Systems |
| Type of Paper : Conference |
| Type of Publication : International |
| Date Of Conference / Journal / Book :
2017-03-10 |
| Conference_Type : IEEE |
